Embodiments of the present invention relate generally to various methods of manufacturing a semiconductor device and, more particularly, to various methods of manufacturing a semiconductor device including gate lines.
A semiconductor device includes numerous transistors, which may be arranged densely and regularly. For example, flash memory includes multiple strings regularly arranged, each including a plurality of cell transistors coupled in series between select transistors. A gate line coupled to the gates of the cell and select transistors may be defined as word and select lines, respectively. In general, the distance between adjacent select lines is greater than the distance between adjacent word lines.
As the complexity of integration increases, since the distance between gate lines shrinks, an interference phenomenon between cell transistors increases. In order to reduce the interference phenomenon between cell transistors, a method of forming an air gap between the cell transistors has been proposed. However, this process as is leads to many problems, and thus requires process improvements.